Logic Circuit Design


ENG 100 Lab #6 Logic Circuit Design


I. Prelab


Design the logic circuit to realize the following truth table:



Inputs


Output



?


D


I


L


A




D


I


L


A


0


0


0


0


0


0


1


1


0


1


0


0


0


1


1


0


1


0


0


0


1


0


1


1


1


1


0


1


1


1


1


1


Use a Karnaugh map to minimize the circuit.


II. Report -- Turn in at beginning of next lab.


1. Karnaugh map


2. Final circuit


3. Intermediate steps you used.